Failsafe Flash Translation Layer
There are many NAND and NOR Flash memory devices, interfaces and technologies that developers can choose. Integrating them reliably and achieving the maximum potential life and high performance presents a significant design challenge. HCC has developed robust fail-safe flash management software and file systems and has support for hundreds of different kinds of memory types, interfaces and controllers.
HCC’s truly fail-safe SafeFTL Flash Translation Layer provides a high-performance solution that allows developers to interface to any flash-based media. SafeFTL presents a simple logical sector interface to an application, such as a file system, and manages the underlying complexity efficiently and safely. When used in conjunction with HCC’s advanced file systems, there is a complete solution for almost any type of media and performance requirement.
- Up to 4 Terabytes in a single wear-leveled array
- High performance, small footprint
- Multi-chip arrays
- Zero copy block read/write
- Cache options
- Support for up to 16kB page size
- Fail-safe from unexpected reset
- Effective wear leveling algorithms
- Bad block management
- Automatic garbage collection
- Support for all common NAND/NOR devices
- Flash drivers and ECC algorithms
- Typically >98% of blocks available
- Fast initialization
- SLC, MLC and multi-plane support
- Optimized random read/write
- Parallel programming
- ONFI driver
- CFI driver
Flash Management Technologies
Enhanced Wear Leveling: Flash cells have a limited life and can only be erased/programmed a certain number of times before becoming unreliable – in effect they ‘wear out’. Wear leveling algorithms are used to maximize the life of the chip by moving the data between physical blocks to ensure some cells are not overused relative to others. HCC has developed sophisticated static and dynamic wear leveling algorithms that maximize the life of the Flash device. These algorithms can be fine-tuned to match the performance requirements.
Error Correction Codes (ECC): The worst-case rate at which wear occurs is defined by the flash manufacturer. ECCs are used to ensure the data is always consistent if used within the chip specification. The strength of the required ECC is defined by the worst-case bit failure rate. HCC provides algorithms for ECC or can work with controller-based ECC solutions when they are essential for flash with higher bit error rates. HCC also provides experience and expertise to ensure the performance meets system requirements.
Bad Block Management: Flash memory contains blocks that may be error-prone or unusable when the device is new. During operation, data in “good blocks” can later be corrupted by charge leakage or disturbance from writes in adjacent parts of the chip. SafeFTL provides management of bad blocks and maps unusable areas to ensure that data is not corrupted.
Read Disturb: Read disturb errors occur when a read operation on one page causes one or more bits to change in other pages of the same block. Executing many read operations on pages within a block, with no intervening erase of that block, increases the risk of bit errors developing. HCC has developed advanced strategies that handle this problem effortlessly.
Conventional file systems are not fail-safe and often experience difficulties when common problems such as power loss or unexpected resets occur. When SafeFTL is used in a correctly designed system, it will guarantee that data will always be consistent. In order to ensure the maximum integrity, the underlying media drivers are also designed to provide fail-safe behavior. HCC takes great care to ensure that file systems are truly fail-safe and are capable of providing a system level review ensuring that the system exhibits correct behavior. Contact your local HCC sales representative if you would like to discuss system level safety.