HCC’s eTaskSync is a no compromise, MISRA-compliant, verifiable scheduler used for running tasks in an embedded system. It provides the essential functions of an embedded kernel: tasks, events, and mutexes using a priority-based, cooperative scheduling mechanism. It can be used for cooperative task scheduling in an embedded system and is particularly suited for embedded systems that require a high level of reliability and availability. It is provided with all the tools required to verify the kernel on the target system.
MISRA Compliance and Verification
eTaskSync is fully compliant with MISRA-C:2004. First introduced by the automotive industry, MISRA has become a ‘best practice’ coding standard widely used in the medical, industrial, telecom, and aerospace industries. HCC has developed its own rigorous coding standard to create a concise, strongly typed subset of the C language for use in embedded systems. The result is clean, clear and robust code without ambiguities. This is ideal for use in the most critical embedded applications. Full compliance documentation, developed using the LDRA Tool Suite, is supplied to help customers integrate with existing development processes and to confirm that the highest standards of compliance have been met.
eTaskSync can be executed externally and you can define the maximum number of ticks it runs for. This makes it easy to plan the execution times of middleware with non-OS or run-till-completion schedulers. The benefit of this approach for the system designer is that middleware stacks will not block the system.
- Conforms to the HCC Advanced Embedded Framework.
- Fully compliant with MISRA-C:2004.
- Prioritized tasks.
- Events – these are used as a signalling mechanism, both between tasks, and from asynchronous sources such as Interrupt Service Routines (ISRs) to tasks.
- Mutexes – these guarantee that, while one task is using a particular resource, no other task can pre-empt it and use the same resource.
- Prioritized scheduling.
- Priority inheritance – this avoids situations where a lower priority task blocks the progress of a higher priority task.
- Time slicing – tasks can be allocated a number of ticks.
- Runs on all 8, 16, and 32 bit micro-controllers.
- Small footprint: <2KB code, 100 bytes RAM.
- 100% statement, branch and MC/DC coverage test code.
- Test suite provides reference usage code.
- Debug module to help with task stack analysis and task performance analysis.
- Dynamic and static code analysis reports.
- Ports to a wide range of microcontrollers are available.
Completely Free Evaluation
A free source code-based evaluation can be downloaded from our Downloads Center and includes all the test and documentation required for verification on the target system.